ICECV 2015 CONFERENCE PROCEEDINGS & PUBLICATIONS Design of a High speed Built-in Repair Analyser for Word-Oriented Memories Mulagundla Laxmi, B.Shivakumar & M. Swetha DSRC Applications in Intelligent Transportation System using SOLS Technique for fully reused VLSI Architecture B. Priyanka & Madupu Sanjay Adaptive Low power Implementation of an On-Chip Permutation Network for Multiprocessor System-On-Chip Susmithavani & B.Balaji Low Adaption Area-Delay Power-Efficient Fixed Point LMS Adaptive Filter N.Pavani, V.Sabitha & P Prasad rao Design of a Prescalar for Low Power Single Phase Clock Distribution P.Ramya, B.Vijay Kumar & P Prasad rao An Adaptive Low Latency Low Complexity Architecture for Matching of Information Coded with Error–Correcting Codes Khadeejah Neelofer Roohi, M.A.Himayath Shamshi & P Prasad rao Power Reduction in L2 Cache System Using Way-Tag Information Under Write Through Policy A.Sudhakar & Mrs.M.Swetha Proposed Encoding Scheme for Reduction Energy Consumption in Network-on-Chip P.Sandhya & K.Thirupathi An high performance Ultra-Sound Transducers using BCD technology Ranjith Maddi & V.Sumalini A Novel 6T SRAM based design with integration of NBTI technique Nagarani Sriramoju & Rayabarapu Venkateshwarlu A High Performance Double tail Comparator design using Inverter Stage Parvathala Swathi & P.Rajani Design of a High Range Proposed Buffer for Level Shifter Operation N.Meena & Ch.Anil Kumar Policy Based Security and Network Management in Computer Networks Anupoju Venkata Malleswara Rao & Dr.Shaheda Akthar
